2009/12/22

Use a 1.53 kOhm resister between SQUID Bias and SQUID Return as the load. Measure the voltage across the resistor using HP3478A to check the zapping function of the software and DCRC.

Changed the command sequence in the zapping vi I:\Labview\DCRC\20070423\DCRC.llb\SCDMS_SquidZAP.vi to

devw 5 2 FFF		Set zapping voltage to 5V
[wait charge time (60s)]
devw 2 0 0000		Zap SQUID DCBA (1110: A, 1101: B, 1011: C, 0111: D; this is the correct mapping.)
[wait zapping time (10s)]
devw  2 0 1111		Disconnect zapping voltage from all SQUIDs
[wait cooldown time (30s)]

The order of channel ABCD was also reversed to make it correct. The user have to zero everything manually before zapping the SQUIDs.

Plot of run003, 5, 6, and 7

Plot of run004
Fitting results
s = fitoptions('Method','NonlinearLeastSquares','Startpoint',[3.6 2 0.03 -14]); f = fittype('a+b*exp(-c*(x-d))','options',s); [c2,gof2] = fit(run004(14:end,1)-run004(1,1),run004(14:end,2),f) c2 = General model: c2(x) = a+b*exp(-c*(x-d)) Coefficients (with 95% confidence bounds): a = 3.598 (3.596, 3.599) b = 1.816 (-5.297e+004, 5.298e+004) c = 0.02951 (0.02914, 0.02987) d = -11 (-9.885e+005, 9.884e+005) gof2 = sse: 0.029512334811715 rsquare: 0.997629123498644 dfe: 281 adjrsquare: 0.997603811649875 rmse: 0.010248224359995

Plot of run008
Fitting result
s = fitoptions('Method','NonlinearLeastSquares','Startpoint',[3.6 2 0.03 -14]); f = fittype('a+b*exp(-c*(x-d))','options',s); [c2,gof2] = fit(run008(45:end,1)-run008(1,1),run008(45:end,2),f) c2 = General model: c2(x) = a+b*exp(-c*(x-d)) Coefficients (with 95% confidence bounds): a = 3.146 (3.143, 3.149) b = 11.26 (-1.674e+006, 1.674e+006) c = 0.03351 (0.03297, 0.03406) d = -23.04 (-4.436e+006, 4.436e+006) gof2 = sse: 0.169925217110765 rsquare: 0.995021813948961 dfe: 323 adjrsquare: 0.994975576926815 rmse: 0.022936526840409

From the two plots above, we can get the capacitance and the serial resistance value.

S=solve('c*(R+1530)=1/0.02951','c*(R+982)=1/0.03351');
[S.c S.R]
 
ans =
 
[ .73813499462601186230029376658193e-2,    3060.8700000000000000000000000005]

The capacitance is 7.4 mF, resistance is 3061 Ohm.

devr dev addr		Dev read, returns 16 bit data
rdf dev cnt		Read FPGA binary
devw 5 0 0000		LED 1 current 0 mA, FFFF is 10 mA
devw 5 1 0000		LED 2 current 0 mA, FFFF is 10 mA
devw 4 0 01		LED 1 on
devw 4 0 10		LED 2 on
wrf 6 001		LED flasher pulse width in unit of 10 us, 10 bit
wrf 7 0001		LED flasher off time in unit of 20 us, 16 bit
wrf d 8008		LED 1 & 2 pulser off (bit 6: LED 1, bit 7: LED 2)
wrf d 8048		LED 1 pulser on
wrf d 8088		LED 2 pulser on
wrf d 80c8		LED 1 and 2 pulser on

A 22.43 kOhm resistor was used as the LED load. First test the frequency response of the measurement setup.

Test the frequency response of the measurement setup

Set the output of HP3325A

1. f = 5 kHz, V = 4 Vpp, DC = 2 V, Square wave.
2. f = 50 kHz, V = 4 Vpp, DC = 2 V, Square wave.

Plot of run009
Plot of run010
The setup is good enough to test the LED pulser.

Set the output of the pulser as following from the control vi.

1. LED 1 current: 160, LED 2 current: 0, ON 400us, OFF 400us, LED 1 enabled.
2. LED 1 current: 160, LED 2 current: 0, ON 100us, OFF 100us, LED 1 enabled.

Plot of run011
Plot of run012
The pulser output at 'high' frequency is distorted. The upper limit is about ON 400us and OFF 400us.

To get rid of the DC offsets, The LEDs have to be turned off when not used. The corrected order I got by experiment to turn on and turn off the LEDs are:

1. ON: a) turn on LEDs by devw 4 0 xx, b) start pulser by wrf d xxxx
2. OFF: a) turn off pulser by wrf d xxxx, b) Turn off LEDs by devw 4 0 00

The implementation of pulser on and off time is not correct. LEDs need to be turned off after flashing.